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pin configuration (top view) mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers description M35060-xxxsp is catv screen display control ic which can dis- play 40 (horizontal) 5 16 (vertical). it has built-in syram which can be used with character rom. it uses a silicon gate cmos process and it housed in a small 32-pin shrink dip package. for M35060-001sp and M35060-002sp that are standard rom versions of M35060-xxxsp, the character pat- terns are also mentioned. features ? screen composition ................................ 40 characters 5 16 lines ? number of characters displayed ................................... 680 (max.) ? character composition ..................................... 12 5 13 dot matrix ? characters available character rom ................ 256 characters syram .............................. 63 characters ? character sizes available horizontal ..................... 2 (once, twice) vertical ......................... 2 (once, twice) setting by every line ? display locations available horizontal direction ................................................ 480 locations vertical direction .................................................... 235 locations ? blinking ................................................................... character units cycle .... approximately 1 second, or approximately 0.5 seconds duty ............................................................... 25%, 50% or 75% ? data input ............................................................ 8-bit parallel 5 3 ? coloring character coloring ......... 8 colors choices per character background coloring ..... 8 colors choices per character raster coloring .................. 8 colors choices per screen ? blanking character size blanking border size blanking matrix-outline halftone blanking can be set by every line ? general-purpose output ports combined port output ............ 6 (switching to rgb output) ? ram erase ............................. display ram erasing by every line syram erasing separately ? scrolling ............ bit by bit smooth scroll implemented by software ? composite synchronizating signal generation .................... built-in (pal, ntsc, m-pal) ? display oscillation circuit .................................................... built-in ? synchronous separation circuit .......................................... built-in ? synchronous correction circuit ........................................... built-in outline 32p4b sck testa p5 p4 p3 p2 p1 p0 testb oscin oscout lp2 v dd2 lp1 vref cs ad0 ad1 ad2 ad3 ad4 ad5 ad6 ad7 v dd1 v ss cvideo lecha lebk cvin hor ac 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 M35060-xxxsp rev.1.1
2 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers pin description these input pins determine address and data of the display ram, control ram, and overlay ram (syram) by 8-bit parallel. hysteresis input is required. when this input pin transitions from h to l, the device is reset. built-in a pull-up resistor. hysteresis input is required. digital power supply pin. this pin must be connected to + 5v. ground pin. this pin must be connected to 0v. this pin outputs the composite video signal. the output signal is 2vp-p. in superim- pose mode, this pins signal consists of the osd signal combined with the input composite signal cvin. this input pin is used for controlling the white character color level of the osd signal. this input pin is used for controlling the black character color level of the osd signal. this input pin is used for the superimpose mode. an external composite signal may be input through this pin and mixed with the internally generated osd signal. this input pin is used to input the same signal as cvin. the horizontal and vertical sync signals are then extracted internally within the device. this input pin is used to determine the slice voltage for extracting the sync signals from the video composite signal. this is filter output pin 1. analog power supply pin. this pin must be connected to +5v. this is filter output pin 2. these are the pins for attaching an external oscillator circuit for generating the synchronization signal: ntsc (3.580mhz), pal (4.434mhz), m-pal (3.576mhz). factory test pin. the pin must be connected to gnd. this output pin can be configured to port p0 or ym output. this output pin can be configured to port p1 or blnk output. this output pin can be configured to port p2 or b output. this output pin can be configured to port p3 or g output. this output pin can be configured to port p4 or r output. this output pin can be configured to port p5 or csyn output. factory test pin. the pin must be connected to gnd. this pin is enabled when the cs pin is l. data input to pins ad0 to ad7 is latched at the rising edge of this signal. this pin is hysteresis input. this is chip selection input pin. when this pin is l, transmission is enabled. this pin is hysteresis input. function symbol ad0~ad7 ac v dd1 v ss cvideo lecha lebk cvin hor vref lp1 v dd2 lp2 oscout oscin testb p0 p1 p2 p3 p4 p5 testa sck cs parallel data input auto-clear input power pin earthing pin composite video signal output character level input black level input composite video signal input synchronous signal input slice level input filter output 1 power pin filter output 2 the pins for attaching an exter- nal oscillator circuit for genera- ting the synchronization signal. test input port output port output port output port output port output port output test input clock input for data input chip select input pin name input/output input input output input input input input input output output output input input output output output output output output input input input
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 3 block diagram write access control read access control display position detection timing generator sync separation vsync separation synchronous correction circuit quadruple frequency circuit display control register display ram character pattern rom syram blinking shift testb cvin lebk lecha cvideo lp1 oscout oscin lp2 sck cs testa hor vref p0 /ym p1 /blnk p2 /b p3 /g p4 /r p5 /csyn port output/selection display control sync generation video signal output ntsc, pal, m-pal v dd2 v ss ac ad0 ad1 ad2 ad3 ad4 ad5 ad6 ad7 32 31 30 16 17 18 21 22 20 23 15 14 13 12 29 28 27 26 25 24 9 11 19 8 7 6 5 4 3 2 1 v dd1 10 input control circuit
4 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers : name or value changes by definite ratio. : the same name or value continues. memory construction address 000 16 to 2a7 16 are assigned to the display ram, 2a8 16 to 2b0 16 are assigned to the display control registers and 300 16 to 6ec 16 are assigned to syram. the internal circuit is reset and all display control registers (address 2a8 16 to 2b0 16 ) are set to 0. the memory constitution of display ram and register is shown in figure 1 and the memory constitution of syram is shown in figure 2. add- ress 000 16 2a7 16 2a8 16 2a9 16 2aa 16 2ab 16 2ac 16 2ad 16 2ae 16 2af 16 2b0 16 da17 sb sb C C C C C C C pc7 C da16 sg sg test 3 C C C C test 23 C pc6 test 19 da15 sr sr test 2 C C test 26 C test 22 C pc5 test 18 da14 syc5 syc5 test 1 blink 3 test 12 test 25 test 21 sers 3 C pc4 test 17 da13 syc4 syc4 test 0 blink 2 eqp phase 2 line b sers 2 C pc3 test 24 da12 syc3 syc3 test 11 blink 1 test 20 phase 1 line g sers 1 send 4 pc2 level 2 da10 syc1 syc1 hp8 hsz 16 vsz 16 dsp0 16 dsp1 16 ers 16 send 2 pc0 level 0 daf syc0 syc0 hp7 hsz 15 vsz 15 dsp0 15 dsp1 15 ers 15 send 1 all24 int non dae bb bb hp6 hsz 14 vsz 14 dsp0 14 dsp1 14 ers 14 send 0 srand 2 pal ntsc dad bg bg hp5 hsz 13 vsz 13 dsp0 13 dsp1 13 ers 13 sst 4 srand 1 mpal dac br br hp4 hsz 12 vsz 12 dsp0 12 dsp1 12 ers 12 sst 3 srand 0 palh dab blink blink blink hp3 hsz 11 vsz 11 dsp0 11 dsp1 11 ers 11 sst 2 ptd 5 test 16 daa cb cb hp2 hsz 10 vsz 10 dsp0 10 dsp1 10 ers 10 sst 1 ptd 4 test 15 da9 cg cg hp1 hsz 9 vsz 9 dsp0 09 dsp1 09 ers 9 sst 0 ptd 3 sepv1 da8 cr cr hp0 hsz 8 vsz 8 dsp0 08 dsp1 08 ers 8 slin 4 ptd 2 sepv0 da7 c7 c7 vp7 hsz 7 vsz 7 dsp0 07 dsp1 07 ers 7 slin 3 ptd 1 blk da6 c6 c6 vp6 hsz 6 vsz 6 dsp0 06 dsp1 06 ers 6 slin 2 ptd 0 C da5 c5 c5 vp5 hsz 5 vsz 5 dsp0 05 dsp1 05 ers 5 slin 1 ptc 5 dsp onv da4 c4 c4 vp4 hsz 4 vsz 4 dsp0 04 dsp1 04 ers 4 slin 0 ptc 4 dsp on da3 c3 c3 vp3 hsz 3 vsz 3 dsp0 03 dsp1 03 ers 3 sbit 3 ptc 3 C da2 c2 c2 vp2 hsz 2 vsz 2 dsp0 02 dsp1 02 ers 2 sbit 2 ptc 2 sel cor da1 c1 c1 vp1 hsz 1 vsz 1 dsp0 01 dsp1 01 ers 1 sbit 1 ptc 1 C da0 c0 c0 vp0 hsz 0 vsz 0 dsp0 00 dsp1 00 ers 0 sbit 0 ptc 0 ex sy color setting syram setting da11 syc2 syc2 test 10 blink 0 hide phase 0 line r sers 0 send 3 pc1 level 1 raster color setting character color setting character setting ~ table 1 the memory constitution of display ram and register table 2 the memory constitution of syram add- ress 300 16 30c 16 310 16 31c 16 6d0 16 6dc 16 6e0 16 6ec 16 0 0 da17 ~ dad 0 0 dac syex syex syex syex syex syex syex syex dab s00b s00b s01b s01b s3db s3db s3eb s3eb daa s00a s00a s01a s01a s3da s3da s3ea s3ea da9 s009 s009 s019 s019 s3d9 s3d9 s3e9 s3e9 da8 s008 s008 s018 s018 s3d8 s3d8 s3e8 s3e8 da7 s007 s007 s017 s017 s3d7 s3d7 s3e7 s3e7 da6 s006 s006 s016 s016 s3d6 s3d6 s3e6 s3e6 da5 s005 s005 s015 s015 s3d5 s3d5 s3e5 s3e5 da4 s004 s004 s014 s014 s3d4 s3d4 s3e4 s3e4 da3 s003 s003 s013 s013 s3d3 s3d3 s3e3 s3e3 da2 s002 s002 s012 s012 s3d2 s3d2 s3e2 s3e2 da1 s001 s001 s011 s011 s3d1 s3d1 s3e1 s3e1 da0 s000 s000 s010 s010 s3d0 s3d0 s3e0 s3e0 syram code 00 16 01 16 3d 16 3e 16 ~ ~ ~ ~~ ~ ~ test n (n = number) is mitsubishi test memory. set 0 to all bits. ~
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 5 screen constitution the screen lines and rows are determined from each address of the display ram. the screen constitution is shown in figure 1. fig. 1 screen constitution 001 002 003 004 005 006 007 008 009 00a 00b 00c 00d 00e 00f 010 011 012 013 014 015 016 017 018 019 01a 01b 01c 01d 01e 01f 020 021 022 023 024 025 026 027 000 079 07a 07b 07c 07d 07e 07f 080 081 082 083 084 085 086 087 088 089 08a 08b 08c 08d 08e 08f 090 091 092 093 094 095 096 097 098 099 09a 09b 09c 09d 09e 09f 078 0a1 0a2 0a3 0a4 0a5 0a6 0a7 0a8 0a9 0aa 0ab 0ac 0ad 0ae 0af 0b0 0b1 0b2 0b3 0b4 0b5 0b6 0b7 0b8 0b9 0ba 0bb 0bc 0bd 0be 0bf 0c0 0c1 0c2 0c3 0c4 0c5 0c6 0c7 0a0 0c9 0ca 0cb 0cc 0cd 0ce 0cf 0d0 0d1 0d2 0d3 0d4 0d5 0d6 0d7 0d8 0d9 0da 0db 0dc 0dd 0de 0df 0e0 0e1 0e2 0e3 0e4 0e5 0e6 0e7 0e8 0e9 0ea 0eb 0ec 0ed 0ee 0ef 0c8 0f1 0f2 0f3 0f4 0f5 0f6 0f7 0f8 0f9 0fa 0fb 0fc 0fd 0fe 0ff 100 101 102 103 104 105 106 107 108 109 10a 10b 10c 10d 10e 10f 110 111 112 113 114 115 116 117 0f0 141 142 143 144 145 146 147 148 149 14a 14b 14c 14d 14e 14f 150 151 152 153 154 155 156 157 158 159 15a 15b 15c 15d 15e 15f 160 161 162 163 164 165 166 167 140 169 16a 16b 16c 16d 16e 16f 170 171 172 173 174 175 176 177 178 179 17a 17b 17c 17d 17e 17f 180 181 182 183 184 185 186 187 188 189 18a 18b 18c 18d 18e 18f 168 1b9 1ba 1bb 1bc 1bd 1be 1bf 1c0 1c1 1c2 1c3 1c4 1c5 1c6 1c7 1c8 1c9 1ca 1cb 1cc 1cd 1ce 1cf 1d0 1d1 1d2 1d3 1d4 1d5 1d6 1d7 1d8 1d9 1da 1db 1dc 1dd 1de 1df 1b8 259 25a 25b 25c 25d 25e 25f 260 261 262 263 264 265 266 267 268 269 26a 26b 26c 26d 26e 26f 270 271 272 273 274 275 276 277 278 279 27a 27b 27c 27d 27e 27f 258 119 11a 11b 11c 11d 11e 11f 120 121 122 123 124 125 126 127 128 129 12a 12b 12c 12d 12e 12f 130 131 132 133 134 135 136 137 138 139 13a 13b 13c 13d 13e 13f 118 191 192 193 194 195 196 197 198 199 19a 19b 19c 19d 19e 19f 1a0 1a1 1a2 1a3 1a4 1a5 1a6 1a7 1a8 1a9 1aa 1ab 1ac 1ad 1ae 1af 1b0 1b1 1b2 1b3 1b4 1b5 1b6 1b7 190 1e1 1e2 1e3 1e4 1e5 1e6 1e7 1e8 1e9 1ea 1eb 1ec 1ed 1ee 1ef 1f0 1f1 1f2 1f3 1f4 1f5 1f6 1f7 1f8 1f9 1fa 1fb 1fc 1fd 1fe 1ff 200 201 202 203 204 205 206 207 1e0 231 232 233 234 235 236 237 238 239 23a 23b 23c 23d 23e 23f 240 241 242 243 244 245 246 247 248 249 24a 24b 24c 24d 24e 24f 250 251 252 253 254 255 256 257 230 281 282 283 284 285 286 287 288 289 28a 28b 28c 28d 28e 28f 290 291 292 293 294 295 296 297 298 299 29a 29b 29c 29d 29e 29f 2a0 2a1 2a2 2a3 2a4 2a5 2a6 2a7 280 051 052 053 054 055 056 057 058 059 05a 05b 05c 05d 05e 05f 060 061 062 063 064 065 066 067 068 069 06a 06b 06c 06d 06e 06f 070 071 072 073 074 075 076 077 050 029 02a 02b 02c 02d 02e 02f 030 031 032 033 034 035 036 037 038 039 03a 03b 03c 03d 03e 03f 040 041 042 043 044 045 046 047 048 049 04a 04b 04c 04d 04e 04f 028 208 209 20a 20b 20c 20d 20e 20f 210 211 212 213 214 215 216 217 218 219 21a 21b 21c 21d 21e 21f 220 221 222 223 224 225 226 227 228 229 22a 22b 22c 22d 22e 22f the hexadecimal numbers in the boxes show the display ram address line 16 row line 0 line 1 line 15
6 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 8 n=0 registers description (1) address 2a8 16 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 status da 0 1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12 13 14 15 16 17 register vp0 vp1 vp2 vp3 vp4 vp5 vp6 vp7 hp0 hp1 hp2 hp3 hp4 hp5 hp6 hp7 hp8 test10 test11 test0 test1 test2 test3 contents function vs = h 5 ( s 2 n vp n ) if vs is the vertical display start location, if hs is the horizontal display start location, hs = t 5 ( s 2 n hp n + 9 ) h: cycle with the horizontal synchronizing pulse t: cycle with the display clock test mode (must be cleared to 0.) must be cleared to 0. remarks the vertical start location is specified using the 8 bits from vp7 to vp0. vp7 to vp0 < 14 16 are not available. the horizontal start location is specified using the 9 bits from hp8 to hp0. hp8 to hp0 < 19 16 are not available. 7 n=0 vs hs hor vert 1 bit weights 1 clock. character displaying area tv screen note: the mark __ around the status value means the reset status by the l level is input to ac pin.
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 7 hsz0 hsz1 hsz2 hsz3 hsz4 hsz5 hsz6 hsz7 hsz8 hsz9 hsz10 hsz11 hsz12 hsz13 hsz14 hsz15 hsz16 blink0 blink1 blink2 blink3 0 1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12 13 14 15 16 17 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 (2) address 2a9 16 status da register contents function remarks set to line 0 of display ram set to line 1 of display ram set to line 2 of display ram set to line 3 of display ram set to line 4 of display ram set to line 5 of display ram set to line 6 of display ram set to line 7 of display ram set to line 8 of display ram set to line 9 of display ram set to line 10 of display ram set to line 11 of display ram set to line 12 of display ram set to line 13 of display ram set to line 14 of display ram set to line 15 of display ram set to line 16 of display ram hszx 0 1 horizontal direction character size 1t/dot 2t/dot t: display clock 0 blinking off duty 50% 1 duty 25% duty 75% 0 1 blink1 blink0 cycle approximately 1 second. cycle approximately 0.5 second. normal blinking normal character, reversed character alternation display. must be cleared to 0. blinking duty ratio can be altered. blinking cycle can be altered. character is in flashing state. character is always displayed (normal character, reversed character).
8 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers vsz0 vsz1 vsz2 vsz3 vsz4 vsz5 vsz6 vsz7 vsz8 vsz9 vsz10 vsz11 vsz12 vsz13 vsz14 vsz15 vsz16 hide test20 eqp test12 0 1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12 13 14 15 16 17 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 (3) address 2aa 16 status da register contents function remarks set to line 0 of display ram set to line 1 of display ram set to line 2 of display ram set to line 3 of display ram set to line 4 of display ram set to line 5 of display ram set to line 6 of display ram set to line 7 of display ram set to line 8 of display ram set to line 9 of display ram set to line 10 of display ram set to line 11 of display ram set to line 12 of display ram set to line 13 of display ram set to line 14 of display ram set to line 15 of display ram set to line 16 of display ram vszx 0 1 vertical direction character size 1h/dot 2h/dot h: horizontal synchronous pulse syram writting over syram writting over or character erasing test mode (must be cleared to 0.) it does not include equivalent pulse. it includes equivalent pulse. test mode (must be cleared to 0.) must be cleared to 0. decided by register liner, g and b or dac bit of syram.
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 9 (4) address 2ab 16 dsp0 00 dsp0 01 dsp0 02 dsp0 03 dsp0 04 dsp0 05 dsp0 06 dsp0 07 dsp0 08 dsp0 09 dsp0 10 dsp0 11 dsp0 12 dsp0 13 dsp0 14 dsp0 15 dsp0 16 phase 0 phase 1 phase 2 test25 test26 0 1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12 13 14 15 16 17 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 status da register contents function remarks set to line 0 of display ram set to line 1 of display ram set to line 2 of display ram set to line 3 of display ram set to line 4 of display ram set to line 5 of display ram set to line 6 of display ram set to line 7 of display ram set to line 8 of display ram set to line 9 of display ram set to line 10 of display ram set to line 11 of display ram set to line 12 of display ram set to line 13 of display ram set to line 14 of display ram set to line 15 of display ram set to line 16 of display ram set by combination of dsp 0xx (address 2ab 16 and dsp 1xx ) and dsp 1xx (address 2ac 16 ). at internal synchronous mode (ex = 1), display monitor signal area is all blanking signal (blnk output) area. note: for halftone display, it is necessary to input the external composite video signal to the cvin terminal, and externally con- nect a 100 to 200 resistor in series. however, the halftone display is possible only with superim- posed displays. 0 character matrix-outline 1 border halftone (note) 0 1 dsp0xx dsp1xx raster color setting. refer fig 3, 4 about phase angle. selcor=0 black red green yellow blue magenta cyan white selcor=1 black redC2 greenC2 yellow gray yellowC2 cyan white color 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 phase 0 phase 1 phase 2 0 0 0 0 1 1 1 1 test mode (must be cleared to 0.) must be cleared to 0.
10 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers (5) address 2ac 16 dsp1 00 dsp1 01 dsp1 02 dsp1 03 dsp1 04 dsp1 05 dsp1 06 dsp1 07 dsp1 08 dsp1 09 dsp1 10 dsp1 11 dsp1 12 dsp1 13 dsp1 14 dsp1 15 dsp1 16 liner lineg lineb test21 0 1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12 13 14 15 16 17 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 status da register contents function remarks set to line 0 of display ram set to line 1 of display ram set to line 2 of display ram set to line 3 of display ram set to line 4 of display ram set to line 5 of display ram set to line 6 of display ram set to line 7 of display ram set to line 8 of display ram set to line 9 of display ram set to line 10 of display ram set to line 11 of display ram set to line 12 of display ram set to line 13 of display ram set to line 14 of display ram set to line 15 of display ram set to line 16 of display ram set by combination of dsp 0xx (address 2ab 16 and dsp 1xx ) and dsp 1xx (address 2ac 16 ). at internal synchronous mode (ex = 1), display monitor signal area is all blanking signal (blnk output) area. note: for halftone display, it is necessary to input the external composite video signal to the cvin terminal, and externally con- nect a 100 to 200 resistor in series. however, the halftone display is possible only with superim- posed displays. 0 character matrix-outline 1 border halftone (note) 0 1 dsp0xx dsp1xx syram color setting. color is decided by dac bit (syex) of syram or hide register. refer fig. 3, 4 about phase angle. selcor=0 black red green yellow blue magenta cyan white selcor=1 black redC2 greenC2 yellow gray yellowC2 cyan white color 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 line r line g line b 0 0 0 0 1 1 1 1 test mode (must be cleared to 0.) must be cleared to 0.
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 11 ers0 ers1 ers2 ers3 ers4 ers5 ers6 ers7 ers8 ers9 ers10 ers11 ers12 ers13 ers14 ers15 ers16 sers0 sers1 sers2 sers3 test22 test23 0 1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12 13 14 15 16 17 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 (6) address 2ad 16 status da register contents function remarks set to line 0 of display ram set to line 1 of display ram set to line 2 of display ram set to line 3 of display ram set to line 4 of display ram set to line 5 of display ram set to line 6 of display ram set to line 7 of display ram set to line 8 of display ram set to line 9 of display ram set to line 10 of display ram set to line 11 of display ram set to line 12 of display ram set to line 13 of display ram set to line 14 of display ram set to line 15 of display ram set to line 16 of display ram set to syram code 00 16 to 0f 16 set to syram code 10 16 to 1f 16 set to syram code 20 16 to 2f 16 set to syram code 30 16 to 3e 16 erase display ram ersx 0 1 ram erase do erase do not erase it is unnecessary to reset these registers to 0. multiple settings of ers n is not allowed. erase syram sersx 0 1 syram erase do erase do not erase it is unnecessary to reset these registers to 0. multiple settings of sers n is not allowed. test mode (must be cleared to 0.) must be cleared to 0.
12 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers (7) address 2ae 16 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 status da 0 1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12 13 14 15 16 17 register sbit0 sbit1 sbit2 sbit3 slin0 slin1 slin2 slin3 slin4 sst0 sst1 sst2 sst3 sst4 send0 send1 send2 send3 send4 contents function remarks set display start bit of scroll block: set display start line of scroll block: sa = s 2 n (sbit n ) 3 n=0 sb = s 2 n (slin n ) 4 n=0 set start line of scroll block (last line number of the fixed block 1): set start line of fixed block 2 (last line number of the scroll block): sd = s 2 n (send n ) 4 n=0 must be cleared to 0. setting valid sa = 0 to 12 invalid sa = 13 to 15 setting valid sb = 0 to 16 invalid sb = 17 to 31 setting valid sc = 0 to 15 invalid sc = 16 to 31 when the scrolling on setting valid sd = 2 to 17 invalid sd = 18 to 31 when the scrolling off set sd = 0 sd > sc + 2 note: when the scrolling on, set the ratio which will be sc < sb < sd. sc = s 2 n (sst n ) 4 n=0
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 13 ptc0 ptc1 ptc2 ptc3 ptc4 ptc5 ptd0 ptd1 ptd2 ptd3 ptd4 ptd5 srand0 srand1 srand2 all24 pc0 pc1 pc2 pc3 pc4 pc5 pc6 pc7 0 1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12 13 14 15 16 17 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 (8) address 2af 16 status da register contents function remarks port p0 output ym output port p1 output blnk output port p2 output b output port p3 output g output port p4 output r output port p5 output csyn output when port output: 0 output, when ym output: negative polarity. when port output: 1 output, when ym output: polarity. when port output: 0 output, when blnk output: negative polarity. when port output: 1 output, when blnk output: polarity. when port output: 0 output, when b output: negative polarity. when port output: 1 output, when b output: polarity. when port output: 0 output, when g output: negative polarity. when port output: 1 output, when g output: polarity. when port output: 0 output, when r output: negative polarity. when port output: 1 output, when r output: polarity. when port output: 0 output, when csyn output: negative polarity. when port output: 1 output, when csyn output: polarity. 0 complete border = 1 dot complete border = 2 dot complete border = 3 dot complete border = 4 dot 1 right and dot border = 1 dot right and dot border = 2 dot right and dot border = 3 dot right and dot border = 4 dot srand2 0 0 1 1 0 1 0 1 srand 1 srand 0 vertical direction is 1 dot only. horizontal display range can be altered when all characters are in matrix-outline size. at external synchronous, set to 0. operation of character code ff 16 becomes ineffective. blanking with all 40 characters in matrix-outline mode display frequency f t control f t = f h 5 { s (2 n pc n ) + 512 } 7 n=0 note: at ex (address 2b0 16 ) = 0 (external synchronous), setting 1 of all24 register is not available. refer fig. 2 about ptc0 to 5, ptd0 to 5. horizontal display period fully blanked with all characters in matrix-outline size. pc7 to pc0 < 36 16 , pc7 to pc0 > c6 16 is not available. select p0 pin select p1 pin select p2 pin select p3 pin select p4 pin select p5 pin select data of p0 pin select data of p1 pin select data of p2 pin select data of p3 pin select data of p4 pin select data of p5 pin condition of border display is changeable.
14 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers interlace noninterlace composite video generation is off. composite video generation is on. display clock is on (oscillating). display clock is off (not oscillating). sync separation is disabled. sync separation is enabled. test mode (must be cleared to 0.) must be cleared to 0. 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 ex selcor dspon dsponv blk sepv0 sepv1 test15 test16 palh mpal pal/ntsc int/non level0 level1 level2 test24 test17 test18 test19 (9) address 2b0 16 status da register contents function remarks external synchronization internal synchronization set to 0. normal mode of expansion must be cleared to 0. digital output display off digital output display on composite video output display off composite video output display on must be cleared to 0. matrix outline matrix outline + border 0 1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12 13 14 15 16 17 test mode (must be cleared to 0.) interlace/noninterlace normal mode interlace/noninterlace expansion mode mpal 0 1 0 1 format ntsc m-pal pal unavailable pal/ntsc 0 0 1 1 refer to table 3, 4, 7 and 8. only at register dsp1 xx = 1 ( xx = 00 to 16) is available. method of sync separation from composite video. only at pal and mpal mode are available. refer to table 5 and 6. sepv1 0 0 1 1 sepv0 0 1 0 1 composite sync spearation function separation is performed during (1) in vertical blanking period separation is performed during (2) in vertical blanking period 1 separation is performed during (3) in vertical blanking period unavailable case (1) condition: vertical sync must repeat 2x within (2) or (3); indicates this area. (note) note: for internal synchronization, shut out (mute) the external video signal input to the cvin terminal, outside the ic. this a voids external video signal leaks inside the ic. 2 3 1
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 15 register construction composition phase2 / lineb 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 phase1 / lineg phase0 / liner ntsc 7 /16 27 /16 /16 17 /16 11 /16 23 /16 pal 7 /16 5 /16 /16 15 /16 11 /16 9 /16 phase (rad) black red green yellow blue magenta cyan white color phase2 / lineb 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 phase1 / lineg phase0 / liner ntsc 7 /16 27 /16 /16 /16 23 /16 pal 7 /16 5 /16 /16 /16 9 /16 phase (rad) black red-2 green-2 yellow gray yellow-2 cyan white color table 3 color and phase of ntsc, pal (selcor = 0) table 4 color and phase of ntsc, pal (selcor = 1) table 5 setting condition at level 0, 1 and 2 at display clock operates 0 1 1 l at display clock stops 1 0 0 h level1 dspon dsponv cs pin table 6 setting condition at level 0, 1 and 2 (at operation) operation state 1 0 1 stop state 0 1 0 level0 level1 level2 fig. 2 switching port output with r, g and b output sync pedestal color burst black red green yellow blue mazenta cyan white color name ntsc 0 7 /16 2 /16 27 /16 2 /16 /16 2 /16 17 /16 2 /16 11 /16 2 /16 23 /16 2 /16 pal 4 /16 7 /16 2 /16 5 /16 2 /16 /16 2 /16 15 /16 2 /16 11 /16 2 /16 9 /16 2 /16 phase (rad) luminance level (v) chroma amplitude (vs. color burst) min. 1.3 1.9 1.9 2.1 2.3 2.7 3.1 2.0 2.5 2.9 3.1 typ. 1.5 2.1 2.1 2.3 2.5 2.9 3.3 2.2 2.7 3.1 3.3 max. 1.7 2.3 2.3 2.5 2.7 3.1 3.5 2.4 2.9 3.3 3.5 min. 1.5 1.4 1.0 1.0 1.4 1.5 typ. 1.0 3.0 2.8 2.0 2.0 2.8 3.0 max. 4.5 4.2 3.0 3.0 4.2 4.5 table 7 video signal level (selcor = 0) no character display at display clock r (g, b, ym, blnk, csyn) ptd polarity ptd ptc select 1 0 1 0
16 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers sync pedestal color burst black red-2 green-2 yellow gray yellow-2 cyan white color name ntsc 0 7 /16 2 /16 27 /16 2 /16 /16 2 /16 /16 2 /16 23 /16 2 /16 pal 4 /16 7 /16 2 /16 5 /16 2 /16 /16 2 /16 /16 2 /16 9 /16 2 /16 phase (rad) luminance level (v) chroma amplitude (vs. color burst) min. 1.3 1.9 1.9 2.1 2.6 3.1 3.1 2.8 3.2 2.9 3.1 typ. 1.5 2.1 2.1 2.3 2.8 3.3 3.3 3.0 3.4 3.1 3.3 max. 1.7 2.3 2.3 2.5 3.0 3.5 3.5 3.2 3.6 3.3 3.5 min. 1.5 0.5 1.0 0.4 1.5 typ. 1.0 2.0 1.0 2.0 0.8 3.0 max. 3.0 1.5 3.0 1.2 4.5 table 8 video signal level (selcor = 1) display forms 1. blanking mode display forms are shown in table 9, display forms at each display mode are shown in fig. 3. table 9 display forms character border matrix-outline halftone display mode blnk output character size border size all blanking blanking off dsp1 xx (address 2ac 16 ) 0 0 1 1 dsp0 xx (address 2ab 16 ) 0 1 0 1 fig. 3 display forms at each display mode scanning (1)character size blnk r,g,b ym cvideo (internal sync) 12 dots a: external display signal b: background color c: character color aa (external sync) c b c b 13 dots l (2)border size 12 dots aa c b c b (4)halftone size 14 dots c b c b bb (3)matrix-outline size 14 dots c b c b bb l aa
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 17 for matrix and halftone, a characters number of dots in the horizontal direction increases to 14. figure 4 shows a display example for a case where adjacent characters have different background colors and for character code f f 16 . fig. 4 number of dots in the horizontal direction at matrix-outline or halftone 2. border mode in border mode, characters are displayed with borders. (refer to table 9.) in matrix and halftone modes also, characters are displayed with borders if the blk register (address 2b0 16 ) is set to 1. table 10 lists the types of borders. table 10 bordering 00 1dot in horizontal direction 2 dots in horizontal direction 3 dots in horizontal direction 4 dots in horizontal direction 1 dot in horizontal direction 2 dots in horizontal direction 3 dots in horizontal direction 4 dots in horizontal direction 01 10 11 0 1 the zero dot srand2 (address 2af 16 ) srand1, 0 horizontal direction bordering is only 1 dot. when the character extends to the top line of the matrix, no border is left at th e top, and when the character extends to the bottom (12th) line of the matrix, no border is left at the bottom. 13 dots 12 dots 13 dots 11 dots 14 dots 11 dots 11 dots character code ff 16 40 characters
18 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 3. setting matrix outline the all24 register (address 2af 16 ) allows you to set a matrix out- line. a matrix outline can be set for each line by using the dsp1 xx register (address 2ac 16 ) . however, this setting is inhibited if the ex register (address 2b0 16 ) is 0 (external sync). an example of how you set a matrix outline is shown in figure 5. fig. 5 setting example all matrix-outline area 4. blinking mode two patterns blinking by register blink3 (address 2a9 16 ) or blink bit of display ram. blinking mode is shown in table 11 (syram do not blink). use registers blink0, 1, and 2 (address 2a9 16 ) to set the duty ratio and period that determines the blinking time. tables 12 and 13 list the relationship between the register settings and the duty ratio and pe- riod. table 11 blinking mode blink off duty 50% 01 duty 25% duty 75% 0 1 blink0 blink1 table 12 setting of duty ratio blink2 0 1 cycle approximately 1 second (vertical sync divided into 1/64) approximately 0.5 second (vertical sync divided into 1/32) table 13 setting of cycle tv screen note : it is not available to set when external synchronous(register ex = ?? br,bg,bb line 9 dsp1 08 dsp1 09 dsp1 10 dsp1 16 dsp1 00 setting example of register dsp1xx phase0,phase1,phase2 osd display area 40 characters ? ..... ..... ? ? ? ? ? ? all24 horizontal display area all matrix-outline all24 to characters all matrix-outline 0 blink3 blinking mode at blinking off blinking normal character, reversed character alternation display 1 normal reverse
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 19 5. scroll display mode the scroll display mode is entered by setting registers sbit0 to 3 (sa), slin0 to 4 (sb), sst0 to 4 (sc), and send0 to 4 (sd) (all at address 2ae 16 ). (scroll is turned off when sd = 0.) the screen is scrolled in the range from the (sc)th line to the (sd-1)th line, and sections above and below this range are fixed. the beginning line and beginning dot of scroll are the (sa)th dot on the (sb)th line. the screen can be scrolled up or down by successively incrementing or decrementing sa and sb. figure 6 shows examples of how the display is scrolled. the scroll range in these examples contains 12 lines (second to the 13th lines). however, the screen can display only 11 lines at a time, and the re- maining one line is handled as a dummy line and not displayed. fig. 6 scrolling example when displayed in order of sa = 0, 1, 2, and so on, the screen scrolls up. when displayed in order of sa = 12, 11, 10, and so on, the screen scrolls down. (1) to scroll the screen up, write the dummy line after you set the 0th dot in sa but before setting the 1st dot. (2) to scroll the screen down, write the dummy line after you set the 0th dot in sa but before setting the 12th dot of the prec eding line. setting example 2 sa = 3 sb = 5 sc = 2 sd = 14 setting example 1 sa = 0 sb = 2 sc = 2 sd = 14 line number when on screen display line number when on screen display dummy line 5th line (0 dot to 2 dots) or 4th line (3 dots to 12 dots) zero line 1st line 3rd 4th line 5th line 6th line 7th line 8th line 10th line 11th line 12th line (0 dot to 12 dots) 14th line 15th line 16th line < fixed block > < fixed block > < scrolling block > 2nd line (0 dot to 12 dots) 9th line 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 2 3 4 5 6 7 8 9 10 11 12 0 1 13 14 15 dummy line 13th line (0 dot to 12 dots) zero line 1st line 6th line 7th line 8th line 10th line 11th line 12th line 13th line 14th line 15th line 16th line < fixed block > < scrolling block > 5th line (3 dots to 12 dots) < fixed block > 9th line 4th line (0 dot to 2 dots) 3rd line 2nd line
20 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 6. character font (1) character rom images are composed on a 12 5 13 dot matrix, and characters can be linked vertically and horizontally with other characters to allow the display the continuous symbols. character code ff 16 is fixed as blank, without a background. fig. 7 character construction (2) syram you can set characters for 63 letters per screen (syram code 00 16 to 3e 16 ). figure 9 shows an example of how to set. use display rams syc5 to 0 (00 16 to 3e 16 ) to specify syram. note that syram code 3f 16 is fixed to a blank, so you cannot set a character font to this code. if you do not put syram and a character together, use code 3f 16 . 12 dots 13 dots fig. 8 example for displaying a continuous pattern 12 dots 13 dots
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 21 fig. 9 setting example of syram (ex) syram code 00 16 .................. set character by setting data to address 300 16 to 30c 16 300 16 301 16 302 16 303 16 304 16 305 16 306 16 307 16 308 16 309 16 30a 16 30b 16 30c 16 address 17 d 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 c * * * * * * * * * * * * * da 13 dots 12 dots 1 bit: 1 dot of character color expansion bit syex (set for each dot line) the hide register (address 2aa 16 ) becomes valid for only the dot line where * = 1. for details, refer to the next section, (3) compound- ing character rom and syram. 0 0 1 1 1 1 1 1 1 1 1 1 1 1 2 0 0 0 1 1 1 1 1 1 1 1 1 1 3 0 0 0 0 1 1 1 1 1 1 1 1 1 4 0 0 0 0 0 1 1 1 1 1 1 1 1 5 0 0 0 0 0 0 1 1 1 1 1 1 1 6 0 0 0 0 0 0 0 1 1 1 1 1 1 7 0 0 0 0 0 0 0 0 1 1 1 1 1 8 0 0 0 0 0 0 0 0 0 1 1 1 1 9 0 0 0 0 0 0 0 0 0 0 1 1 1 a 0 0 0 0 0 0 0 0 0 0 0 1 1 b 0 0 0 0 0 0 0 0 0 0 0 0 1 12 dots 13 dots 1 0 0 1 1 1 1 1 1 1 1 1 1 1
22 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers liner, lineg, lineb (3) compounding character rom and syram you can compound characters in character rom with syram. the compounding method is determined by the syex color ex- pansion bit and the hide register (address 2aa 16 ). for dot lines where syex = 0, the syram color is set by the dis- play rams sr, sg, and sb irrespective of the hide registers content. if the hide registers content is 0, the syram color for dot lines where syex = 1 is set by the liner, lineg, and lineb regis- ters (address 2ac 16 ). if the hide registers content is 1, the character rom part of the dot lines where syex = 1 is overwritten in hide mode with colors set by the liner, lineg, and lineb registers irrespective of the roms content and color. the color of the syram part is set by the display rams sr, sg, and sb as in the case of dot lines where syex = 0. figure 10 shows an example for each instance of compounding. fig. 10 compounding example when hide = 1, the character roms contents for dot lines where syex = 1 become invisible. syram contents of register hide 0 (normal mode) 1 (hide mode) ex. 1 ex. 2 sr, sg, sb syex 0 0 0 0 0 0 0 0 0 0 0 0 0 sr, sg, sb syex 0 0 0 0 0 0 0 0 0 0 0 0 0 syex 1 1 1 1 1 0 0 0 0 0 0 0 0 sr, sg, sb liner, lineg, lineb sr, sg, sb syex 1 1 1 1 1 0 0 0 0 0 0 0 0 compounding character rom
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 23 example for data input use an 8-bit parallel 5 3 serial input to set data in the display ram, display control register, and syram. table 14 lists an example of how data is set. da 7 1 0 s007 s017 da 8 0 0 s008 s018 da f 0 0 0 0 1 2 3 4 822 823 824 825 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 no. contents address/data remarks da 17 0 0 0 0 0 0 sb sb sb 0 0 0 0 0 0 0 pc7 0 da 16 0 0 0 0 da 15 0 0 0 0 da 14 0 0 0 0 da 13 0 0 0 0 da 12 0 1 0 0 da 11 0 0 0 0 da 10 0 1 0 0 da e 0 0 0 0 da d 0 0 0 0 da c 0 0 syex syex da b 0 0 s00b s01b da a 0 0 s00a s01a da 9 1 0 s009 s019 da 6 0 0 s006 s016 da 5 1 0 s005 s015 da 4 1 0 s004 s014 da 3 0 0 s003 s013 da 2 0 0 s002 s012 da 1 0 0 s001 s011 da 0 0 0 s000 s010 0 0 sg sg 0 0 sr sr 0 0 syc 5 syc 5 0 0 syc 4 syc 4 0 0 syc 3 syc 3 0 0 syc 2 syc 2 0 0 syc 1 syc 1 0 0 syc 0 syc 0 0 0 bb bb 0 0 bg bg syex 0 br br s3eb 0 blink blink s3ea 0 cb cb s3e9 0 cg cg s3e8 0 cr cr s3e7 0 c7 c7 s3e6 0 c6 c6 s3e5 0 c5 c5 s3e4 0 c4 c4 s3e3 0 c3 c3 s3e2 0 c2 c2 s3e1 0 c1 c1 s3e0 0 c0 c0 sg 0 0 0 0 0 0 0 pc6 0 sr 0 0 0 0 0 0 0 pc5 0 syc 5 0 blink 3 0 0 0 0 0 pc4 0 syc 4 0 blink 2 eqp phase 2 line b sers 2 0 pc3 0 syc 3 0 blink 1 0 phase 1 line g sers 1 send 4 pc2 1 syc 2 0 blink 0 hide phase 0 line r sers 0 send 3 pc1 0 syc 1 hp8 hsz 16 vsz 16 dsp 016 dsp 116 ers 16 send 2 pc0 1 syc 0 hp7 hsz 15 vsz 15 dsp 015 dsp 115 ers 15 send 1 all24 1 bb hp6 hsz 14 vsz 14 dsp 014 dsp 114 ers 14 send 0 srand 2 0 bg hp5 hsz 13 vsz 13 dsp 013 dsp 113 ers 13 sst 4 srand 1 0 br hp4 hsz 12 vsz 12 dsp 012 dsp 112 ers 12 sst 3 srand 0 0 blink hp3 hsz 11 vsz 11 dsp 011 dsp 111 ers 11 sst 2 ptd 5 0 cb hp2 hsz 10 vsz 10 dsp 010 dsp 110 ers 10 sst 1 ptd 4 0 cg hp1 hsz 9 vsz 9 dsp 009 dsp 109 ers 9 sst 0 ptd 3 sepv 1 cr hp0 hsz 8 vsz 8 dsp 008 dsp 108 ers 8 slin 4 ptd 2 sepv 0 c7 vp7 hsz 7 vsz 7 dsp 007 dsp 107 ers 7 slin 3 ptd 1 blk c6 vp6 hsz 6 vsz 6 dsp 006 dsp 106 ers 6 slin 2 ptd 0 0 c5 vp5 hsz 5 vsz 5 dsp 005 dsp 105 ers 5 slin 1 ptc 5 1 c4 vp4 hsz 4 vsz 4 dsp 004 dsp 104 ers 4 slin 0 ptc 4 1 c3 vp3 hsz 3 vsz 3 dsp 003 dsp 103 ers 3 sbit 3 ptc 3 0 c2 vp2 hsz 2 vsz 2 dsp 002 dsp 102 ers 2 sbit 2 ptc 2 sel cor c1 vp1 hsz 1 vsz 1 dsp 001 dsp 101 ers 1 sbit 1 ptc 1 0 c0 vp0 hsz 0 vsz 0 dsp 000 dsp 100 ers 0 sbit 0 ptc 0 ex address setting display off set addresses syram 300 16 to 6ec 16 set address set registers address display ram 000 16 to 2a7 16 set registers address 2a8 16 to 2af 16 display on address (2b0 16 ) data (2b0 16 ) data (300 16 ) data (301 16 ) data (6ec 16 ) address (000 16 ) data (000 16 ) data (001 16 ) data (2a7 16 ) data (2a8 16 ) data (2a9 16 ) data (2aa 16 ) data (2ab 16 ) data (2ac 16 ) data (2ad 16 ) data (2ae 16 ) data (2af 16 ) data (2b0 16 ) ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ table 14 data setting
24 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers serial data input timing (1) the address consists of 8 bits 5 3. (2) the data consists of 8 bits 5 3. (3) the 8 bits 5 3 in the sck after the cs signal has fallen are the address, and for succeeding input data, the address is incremented every 24 bits (8 bits 5 3). refer to fig.12 about de- tail for address increment. fig. 11 serial input timing cs sck da7 to da0 (msb) (lsb) address (8 bits 5 3) lsb lsb lsb msb msb msb data n (8 bits 5 3) data n + 1(8 bits 5 3) n=1,2,3............
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 25 fig. 12 address construction when entering data, note that although addresses are incremented every data entry (8 bits 5 3), if an address value falls in the unused address area, it is automatically converted to the address value indicated by the arrow. when entering syram data, for example, you can set this data simply by setting address 300 16 first and then entering data 300 16 to 30c 16 (syram code 00 16 ) and next data 310 16 to 31c 16 (syram code 01 16 ). the same applies for syram code 02 16 to 3e 16 . 000 16 2a7 16 2a8 16 display ram 2b0 16 register unused address area syram code 00 16 30d 16 unused address area 2b1 16 2ff 16 300 16 syram code 01 16 31d 16 unused address area syram code 02 16 32d 16 unused address area syram code 3e 16 6ed 16 fff 16 unused address area *jump to address 000 16 automatically *jump to address 310 16 automatically *jump to address 000 16 automatically *jump to address 320 16 automatically *jump to address 330 16 automatically 310 16 320 16 6e0 16 *jump to address 6e0 16 automatically unused address area 600 16 following fff 16 is not available 330 16 address ....... ... ... .. ... .. ... .. ... .. ... .. .. ...
26 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers fig.13 M35060-xxxsp example of peripheral circuit note 1 clamp sync chip to 1.50v. note 2 set basic electric potential in consideration of dynamic range of the transistor. note 3 external loop filter constant is provisional value. note 4 set electric potential of vref to (sync chip electric potential + 0.25) v= 1.75v. note 5 construct integral circuit by built-in 30k w of ac pin and an external condenser. attention to supply voltage rise time about this cr con- stant. note 6 this is provisional value of sync separation noise elimi- nate filter. note 7 connect crystal vibrator. ntsc: 3.580mhz pal: 4.434mhz m-pal: 3.576mhz M35060-xxxsp peripheral circuit ad1 ad2 ad3 ad4 ad5 ad6 ad7 ac v dd1 v ss cvideo lecha lebk cvin hor sck testa p5 p4 p3 p2 p1 p0 testb oscin oscout lp2 v dd2 lp1 vref 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 470 100p note 6 220 2.2k 120 220 +7.0v 10k 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 + note 1 +5.0v 470 +7.0v 1.75v 680 note 3 note 4 note 3 470p note 5 1.50v 4700p 62 + 1k cs +5.0v note 7 + + + ++ + note 2 external composite video signal input composite video signal output from microcomputer 1 m 47 m 220 m 100 m 1 m 0.01 m 1 m 1 m 100 m 0.01 m 0.01 m 47 m ad0
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 27 timing requirements (t a = C 20c to + 70c, v dd = 5.00 0.25v unless otherwise noted) t w (sck) t su (cs) t h (cs) t su (ad) t h (ad) t h (sck) symbol sck width cs setup time cs hold time ad setup time ad hold time 1 word hold time paramenter limits min. 200 200 2 200 200 2 typ. max. ns ns ms ns ns ms unit fig. 14 serial input timing requirements data input sck cs cs sck 2 m s (min.) tw(cs) tw(sck) tsu(ad) th(ad) tsu(cs) th(cs) tw(sck) 12 3 12 3 123 th(sck) ad0 to 7 more than 2 m s th(sck) more than 2 m s
28 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers precautions 1. note for when starting of system before setting registers at the starting of system, be sure to re- ___ set the M35060-xxxsp by applying l level to the ac pin. 2. when power supply noise is generated, the internal oscillator circuit does not stabilize, whereby causing horizontal jitters across the picture display. therefore, connect a bypass capaci- tor between the power supply and gnd. 3. note for when throwing power supply into the M35060-xxxsp when power to the M35060-xxxsp is activated, characters are sometimes output without defining the internal display ram, composite ram and register. also, immediately after power is turned on, up until the oscillator circuit stabilizes, data is some- times not set correctly in the register. therefore, use the follow- ing start-up procedure. __ (a) throwing power supply into the M35060-xxxsp(ac pin = l ) __ (b) auto-clear releasing (ac pin = h) (c) 200 ms waiting state (stabilization period of internal oscillation circuit) data input is forbidden. (d) set register leveln _____ (e) set register pal/ntsc (f) set register pcn (g) 20 ms waiting state (stabilization period of internal oscillation circuit) data input is forbidden. (h) set other registers (i) set syram (j) set display ram (k) set register dspon and register dsponv to display on 4. precautions when resuming internal oscillation from the off state. the internal oscillator circuit stops oscillating when register level = 1, dspon = 0, dsponv = 0 and cs terminal = h. when resuming internal oscillation from the off state, up until the oscillator circuit stabilizes, data is sometimes not set cor- rectly in the register. therefore, start oscillation as follows. __ (a) cs pin = h (oscillation stop) __ (b) cs pin = l (oscillation start) (c) 20 ms waiting state (stabilization period of internal oscillation circuit) (d) set register level 1 = 0 (e) set other registers: syram, display ram (f) set register dspon and register dsponv to display on 5. note for oscillation make note of the fact that the internal oscillator circuit cannot stabilize in the below situations. (a)when the external composite video signal is discontinuous (changing channels etc.) (b) when change the setting of register pcn (c) when change the setting of register leveln when (a)~(c), set the display to off by registers dspon and dsponv before change the setting. other registers settings are forbidden during 20ms after the setting. 6. when no external composite video signal is input (without a sig- nal, characters cannot be displayed by external synchronization. therefore, switch to internal synchronization.) 7. when signal level of the external composite video signal is ex- tremely poor (with a weak electric field, character display is un- controllable by external synchronization. therefore, switch to internal synchronization.) 8. when a crystal oscillator is connected to oscin (22-pin) or oscout (21-pin) (talk with the manufacturer of the crystal os- cillator you are using about matching it to this ic.)
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 29 symbol v dd v i v o p d t opr t stg parameter supply voltage input voltage output voltage power dissipation operating temperature storage temperature symbol v dd v ih v il v cvin f oscin supply voltage h level input voltage ac, cs, sck, ad0 to ad7 l level input voltage ac, cs, sck, ad0 to ad7 composite video input supply voltage cvin oscillation frequency for synchronous signal parameter absolute maximum ratings (v dd = 5.00v, t a = C 20c to +70c unless otherwise noted) unit v v v mw c c unit v v v v mhz min. 4.75 0.8 5 v dd 0 typ. 5.00 v dd 0 2vp-p 3.580 4.434 3.576 max. 5.25 v dd 0.2 5 v dd limits conditions with respect to v ss . t a = 25c ratings C 0.3 to 6.0 v ss C 0.3 < v i < v dd +0.3 v ss < v o < v dd 300 C 20 to 70 C 40 to 125 recommended operational conditions (v dd = 5.00v, t a = C 20c to +70c unless otherwise noted) electrical characteristics (v dd = 5.00v, t a = +25c unless otherwise noted) symbol v dd i dd v oh v ol r i supply voltage supply current h level output voltage p0 to p5 l level output voltage p0 to p5 pull-up resistance ac parameter unit v mv v v k w t a = C 20c to +70c v dd = 5.00v v dd = 4.75, i oh = C 0.2ma v dd = 4.75, i ol = 0.2ma v dd = 5.00v test conditions min. 4.75 3.75 10 typ. 5.00 30 30 max. 5.25 60 0.4 100 limits video signal input conditions (v dd = 5v, t a = C 20c to +70c) symbol v in-cu composite video signal input clamp supply voltage parameter unit sync-chip supply voltage test conditions min. typ. 1.5 max. limits v
30 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers note for supplying power (1) timing of power supplying to ac pin the internal circuit of M35060-xxxsp is reset when the level of the auto clear input pin ac is l. this pin is hysteresis input with the pull-up resistor. the timing about power supplying of ac pin is shown in figure 15. t w is the interval after the supply voltage becomes 0.8 5 v dd or more and before the supply voltage to the ac pin (v ac ) becomes 0.2 5 v dd or more. after supplying the power (v dd and v ss ) to M35060-xxxsp, the t w time must be reserved for 1 ms or more. before starting input from the microcomputer, the waiting time (t s ) must be reserved for 200 ms after the supply voltage to the ac pin becomes 0.8 v dd or more. (2) timing of power supplying to v dd 1 pin and v dd 2 pin the power need to supply to v dd 1 and v dd 2 at a time, though it is separated perfectly between the v dd 1 as the digital line and the v dd 2 as the analog line. fig. 15 timing of power supplying to ac pin precautin for use notes on noise and latch-up connect a capacitor (approx. 0.1f) between pins v dd and v ss at the shortest distance using relatively thick wire to prevent noise and latch up. rom ordering method please submit the information described below when ordering mask rom. (1) rom order confirmation form .............................................. 1 (2) data to be written into mask rom ............................... eprom (three sets containing the identical data) (3) mark specification form ......................................................... 1 (4) program for character font generating + froppy disk in which character data is input. supply voltage v dd 0.8 5 v dd 0.2 5 v dd tw voltage [v] time t [s] v ac (ac pin input voltage) 200ms data input is not available
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 31 standard rom type: M35060-001sp M35060-001sp is a standard rom type of M35060-xxxsp. character patterns are fixed to the contents of figure 16 to 19. fig. 16 M35060-001sp character patterns (1) 00 16 01 16 02 16 03 16 04 16 05 16 06 16 07 16 08 16 09 16 0a 16 0b 16 0c 16 0d 16 0e 16 0f 16 10 16 11 16 12 16 13 16 14 16 15 16 16 16 17 16 18 16 19 16 1a 16 1b 16 1c 16 1d 16 1e 16 1f 16 20 16 21 16 22 16 23 16 24 16 25 16 26 16 27 16 28 16 29 16 2a 16 2b 16 2c 16 2d 16 2e 16 2f 16 30 16 31 16 32 16 33 16 34 16 35 16 36 16 37 16 38 16 39 16 3a 16 3b 16 3c 16 3d 16 3e 16 3f 16
32 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers fig. 17 M35060-001sp character patterns (2) 40 16 41 16 42 16 43 16 44 16 45 16 46 16 47 16 48 16 49 16 4a 16 4b 16 4c 16 4d 16 4e 16 4f 16 50 16 51 16 52 16 53 16 54 16 55 16 56 16 57 16 58 16 59 16 5a 16 5b 16 5c 16 5d 16 5e 16 5f 16 60 16 61 16 62 16 63 16 64 16 65 16 66 16 67 16 68 16 69 16 6a 16 6b 16 6c 16 6d 16 6e 16 6f 16 70 16 71 16 72 16 73 16 74 16 75 16 76 16 77 16 78 16 79 16 7a 16 7b 16 7c 16 7d 16 7e 16 7f 16
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 33 fig. 18 M35060-001sp character patterns (3) 00 16 01 16 02 16 03 16 04 16 05 16 06 16 07 16 08 16 09 16 0a 16 0b 16 0c 16 0d 16 0e 16 0f 16 10 16 11 16 12 16 13 16 14 16 15 16 16 16 17 16 18 16 19 16 1a 16 1b 16 1c 16 1d 16 1e 16 1f 16 20 16 21 16 22 16 23 16 24 16 25 16 26 16 27 16 28 16 29 16 2a 16 2b 16 2c 16 2d 16 2e 16 2f 16 30 16 31 16 32 16 33 16 34 16 35 16 36 16 37 16 38 16 39 16 3a 16 3b 16 3c 16 3d 16 3e 16 3f 16
34 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers fig. 19 M35060-001sp character patterns (4) 40 16 41 16 42 16 43 16 44 16 45 16 46 16 47 16 48 16 49 16 4a 16 4b 16 4c 16 4d 16 4e 16 4f 16 50 16 51 16 52 16 53 16 54 16 55 16 56 16 57 16 58 16 59 16 5a 16 5b 16 5c 16 5d 16 5e 16 5f 16 60 16 61 16 62 16 63 16 64 16 65 16 66 16 67 16 68 16 69 16 6a 16 6b 16 6c 16 6d 16 6e 16 6f 16 70 16 71 16 72 16 73 16 74 16 75 16 76 16 77 16 78 16 79 16 7a 16 7b 16 7c 16 7d 16 7e 16 7f 16
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 35 fig. 20 M35060-002sp character patterns (1) standard rom type: M35060-002sp M35060-002sp is a standard rom type of M35060-xxxsp. character patterns are fixed to the contents of figure 20 to 23.
36 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers fig. 21 M35060-002sp character patterns (2)
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 37 fig. 22 M35060-002sp character patterns (3)
38 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers fig. 23 M35060-002sp character patterns (4)
mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers 39 32p4b (32-pin shrink dip) mark specification form
40 mitsubishi microcomputers M35060-xxxsp screen character and pattern display controllers package outline 32p4b
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rev. rev. no. date 1.0 first edition 980402 1.1 ? deletes some japanese font and create pdf file (some pages) 000725 ? p39 and p40 mark specification form and package outline are added revision description list M35060-xxxsp data sheet (1/1) revision description

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